1. Field of the Invention
This invention relates to a solid state imaging apparatus of the interline transfer type or the frame interline transfer type, and more particularly to a solid state imaging apparatus wherein metal wirings for supplying driving pulses to transfer electrodes of vertical CCD registers are provided along the vertical CCD registers and the smear characteristic is improved.
2. Description of the Related Art
An interline transfer type solid state imaging apparatus of the type mentioned which has conventionally been employed usually adopts such a construction as shown in FIG. 1.
FIG. 1 is a schematic view of a conventional solid state imaging apparatus of the interline transfer type. Referring to FIG. 1, reference numeral 31 denotes a photoelectric transducer, 32 a vertical CCD register, 33 a charge read-out region, 34 a horizontal CCD register, 35 a charge detector, 36 an output amplifier, and 37 an imaging region.
A plurality of photoelectric transducers 31 are arranged two-dimensionally, and vertical CCD registers 32 are provided corresponding to columns of the photoelectric transducers. Charge read-out regions 33 are formed between photoelectric transducers 31 and vertical CCD registers 32. Horizontal CCD register 34 is provided at ends of vertical CCD registers 32, and charge detector 35 and output amplifier 36 are formed at an end of horizontal CCD register 34. It is to be noted that an area surrounded by broken lines is imaging region 37.
Signal charge photo-electrically converted by photoelectric transducers 31 is transferred to vertical CCD registers 32 via charge read-out regions 33. The read out signal charge is transferred to horizontal CCD register 34 by vertical CCD registers 32 and further to charge detector 35 by horizontal CCD register 34 and then outputted via output amplifier 36.
FIG. 2 is a schematic view showing a form of connection between vertical transfer electrodes arranged on vertical CCD registers in a conventional solid state imaging apparatus and vertical bus lines for supplying vertical driving pulses to the vertical transfer electrode. In FIG. 2, reference numeral 37 denotes an imaging region, 41 a vertical transfer electrode, 42 a vertical bus line, and 43 a contact.
Here, a case wherein four phase vertical driving pulses (.PHI.V1 to .PHI.V4) are used for driving is shown. Vertical transfer electrodes 41 extend in a horizontal direction in imaging region 37 and are connected to vertical bus lines 42 at both ends of imaging region 37 by contacts 43 periodically at intervals of four electrodes in the vertical direction. Generally, since vertical transfer electrodes 41 are formed from a polycrystalline silicon film or a like film, at a central location of imaging region 37 remote from vertical bus lines 42, reduction in transfer charge amount and degradation in transfer efficiency are sometimes caused by rounding in waveform of vertical driving pulses by the resistances and capacitances of vertical transfer electrodes 41.
A technique is known wherein, in order to overcome this problem, vertical transfer electrodes 41 are backed with metal wirings (hereinafter referred to as shunt wirings) formed from a tungsten film, an aluminum film or some other suitable film. A solid state imaging apparatus which uses this technique is disclosed, for example, in Japanese Patent Laid-Open Application No. Heisei 3-256359.
FIG. 3 is a schematic view illustrating a form of connection among vertical transfer electrodes, shunt wirings and vertical bus lines in a conventional solid state imaging apparatus which has shunt wirings. In FIG. 3, reference numeral 37 denotes an imaging region, 51 a vertical transfer electrode, 52 a shunt wring, 53 a backing contact, 54 a vertical bus line, and 56 a contact.
Here, a case wherein four phase vertical driving pulses (.PHI.V1 to .PHI.V4) are used is shown. Vertical transfer electrodes 51 extend in a horizontal direction in imaging region 37 and are connected by backing contacts 53 to shunt wirings 52 provided on vertical CCD registers 32. Backing contacts 53 are provided periodically at intervals of four electrodes in the vertical direction and at intervals of 4 pixels in the horizontal direction. Shunt wirings 52 extend outwardly from imaging region 37 and are connected to vertical bus lines 54 extending in the horizontal direction by contacts 56 periodically at intervals of four pixels in the horizontal direction. Vertical driving pulses .PHI.V1 to .PHI.V4 are individually applied to vertical bus lines 54.
Next, the construction of shunt wirings 52 is described in more detail.
FIG. 4 is a schematic plan view showing, in an enlarged scale, part of the imaging region shown in FIG. 3. In FIG. 4, reference numeral 31 denotes a photoelectric transducer, 52 a shunt wiring, 53 a backing contact, and 61 and 62 denote each a vertical transfer electrode.
Here, the imaging region is shown for approximately four pixels in the vertical and horizontal directions. A plurality of vertical transfer electrodes 61 and 62 are provided for vertical CCD registers 32. Vertical transfer electrodes 61 and 62 extend in the horizontal direction and are formed in a comb-like shape such that they may form openings above photoelectric transducers 31. Shunt wirings 52 extend in the vertical direction on vertical CCD registers 32 such that they cover over vertical transfer electrodes 61 and 62. Shunt wirings 52 are connected to vertical transfer electrodes 61 and 62 periodically at intervals of four electrodes in the vertical direction and at intervals of four pixels in the horizontal direction by backing contacts 53. It is to be noted that, since shunt wirings 52 function as wirings for supplying vertical driving pulses to vertical transfer electrodes 61 and 62, each two shunt wirings adjacent to each other are separated from each other in regions (hereinafter referred to as delivery regions) between photoelectric transducers 31 adjacent to each other in the vertical direction. It is to be noted that the gap between adjacent shunt wirings 52 is denoted by d1.
Next, a sectional construction of a pixel is described with reference to two figures. FIG. 5 is a schematic sectional view taken along A-A' of FIG. 4 including a photoelectric transducer. In FIG. 5, reference numeral 31 denotes a photoelectric transducer, 33 a charge read-out region, 52 a shunt wiring, 53 a backing contact, 61 a vertical transfer electrode, 71 a semiconductor substrate, 72 a low density well, 73 a charge transfer element, 74 a high density diffused layer, 75 a barrier region, 76 a channel stop, and 77, 78 and 79 each denotes an insulation film.
Referring to FIG. 5, low density well 72 is provided on a main surface of semiconductor substrate 71. Photoelectric transducers 31 and charge transfer elements 73 are provided in low density well 72. High density diffused layer 74 for reducing dark current is provided in contact with the front face sides of photoelectric transducers 31. Further, barrier regions 75 for preventing invasion of charge to the charge transfer elements by diffusion are provided in contact with the opposite sides to the front faces of charge transfer elements 73. Charge read-out regions 33 for transferring signal charge from photoelectric transducers 31 to charge transfer elements 73 are provided between photoelectric transducers 31 and charge transfer elements 73 corresponding to photoelectric transducers 31. Further, channel stops 76 are provided between photoelectric transducers 31 remote from charge read-out regions 33 and charge transfer elements 73. Vertical transfer electrodes 61 are provided on the surface of semiconductor substrate 71 with insulation film 77 interposed therebetween, and further, shunt wirings 52 are provided with insulation film 78 interposed therebetween. Shunt wirings 52 are connected to vertical transfer electrodes 61 by backing contacts 53. Insulation film 79 is provided above shunt wirings 52.
FIG. 6 is a schematic sectional view taken along line B-B' of FIG. 4 including a delivery region. In FIG. 6, reference numeral 62 denotes a vertical transfer electrode, and 81 an insulation film, and the same components as those in FIG. 5 are denoted by the same reference numerals.
As shown in FIG. 6, in the section including a delivery region, channel stops 76 are provided on both sides of each charge transfer element 73. Vertical transfer electrode 61 is provided on the surface of semiconductor substrate 71 with insulation film 77 interposed therebetween, and vertical transfer electrode 62 is provided on vertical transfer electrode 61 with insulation film 81 interposed therebetween. Further, shunt wiring 52 is provided on vertical transfer electrode 62 with insulation film 78 interposed therebetween, and insulation film 79 is provided on shunt wiring 52.
Next, an example of method of production of the conventional imaging apparatus having the section shown in FIG. 6 is described with reference to the drawings. It is to be noted that, in order to make differences from the present invention clear, description is given with stress placed on the step of forming shunt wirings 52.
FIGS. 7(a) to 7(c) and 8(d) to 8(f) are schematic sectional views illustrating a flow of steps of production of the conventional imaging apparatus. In those figures, reference 91 denotes a resist, and the same components as those in FIG. 6 are denoted by the same reference numerals.
As shown in FIG. 7(a), ions are implanted into semiconductor substrate 71 using, as a mask, a resist pattern formed using a photo-lithography technique to form photoelectric transducers 31 (not shown), high density diffused layer 74 (not shown), barrier regions 75, charge transfer elements 73, charge read-out regions 33 (not shown) and channel stops 76.
Then, insulation film 77 made of a silicon dioxide film, a silicon nitride film or some other suitable film is formed on a main surface of semiconductor substrate 71, and then a polycrystalline silicon film of the first layer is formed and selective etching of it is performed using, as a mask, a resist pattern formed using a photo-lithography technique to form vertical transfer electrodes 61 of the first layer. Further, insulation film 81 made of a silicon dioxide film, a silicon nitride film or some other suitable film is formed, and then vertical transfer electrodes 62 made of a polycrystalline silicon film of the second layer are formed in a similarly manner as in the formation of vertical transfer electrodes 61.
Then, insulation film 78 made of a silicon dioxide film or some other suitable film is formed as seen in FIG. 7(b), and selective etching is performed using, as a mask, a resist pattern formed using a photo-lithography technique to form backing contacts 53 (not shown). Thereafter, shunt wirings 52 made of a tungsten film, an aluminum film or some other suitable film is formed by a sputtering method or a chemical gas phase growth method.
Then, resist 91 is applied to shunt wirings 52 as shown in FIG. 7(c), and the resist at portions of the delivery regions and at the openings (not shown) of photoelectric transducers 31 is removed using a photo-lithography technique. Here, the resist opening width on the delivery regions is denoted by d'.
Thereafter, anisotropic etching is performed by reactive ion etching or the like using patterned resist 91 as shown in FIG. 8(d), and then resist 91 is removed as shown in FIG. 8(e), whereafter insulation film 79 is formed as shown in FIG. 8(f).
By the way, one of major characteristics of a solid state imaging apparatus is a smear characteristic. Smear signifies false signal charge which leaks into charge transfer elements 73 within a period within which signal charge is transferred in vertical CCD registers 32. Usually, in order to suppress the smear, a light intercepting film made of a metal film is formed such that it covers over vertical transfer electrodes 61 and 62 provided on charge transfer elements 73. It is to be noted that, in FIG. 4, shunt wirings 52 serve also as the light intercepting film.
In order to suppress the smear, it is preferable to intercept light in the entire area other than photoelectric transducers 31. However, where shunt wirings 52 serve also as the light intercepting film as shown in FIG. 4, gaps between the shunt wirings are produced on the delivery regions. Consequently, light incident through the gaps between shunt wirings 52 makes a cause of the smear. Since an i-line stepper is usually used on the product level, opening width d' of resist 91 in FIG. 7(c) is approximately 0.4 .mu.m. Therefore, gap d1 between shunt wirings 52 in FIG. 4 is 0.4 .mu.m or more. Since visible rays can pass the gaps of approximately 0.4 .mu.m, there is a problem in that the smear cannot be suppressed sufficiently.
In order to improve this, a technique of newly adding a light intercepting film for covering over the gaps between shunt wirings 52 on the delivery regions has been proposed. A technique of the type just mentioned is disclosed, for example, in Japanese Patent Laid-Open Application No. Heisei 4-216672.
FIG. 9 is a schematic plan view of part of an imaging region of a conventional solid state imaging apparatus which has a light intercepting film on delivery regions. In FIG. 9, reference numeral 111 denotes a light intercepting film, and the same components as those of FIG. 4 are denoted by the same reference numerals.
In FIG. 9, the imaging region is shown for approximately four pixels in both of the vertical and horizontal directions. Referring to FIG. 9, the solid state imaging apparatus shown is different in construction from that shown in FIG. 4 in that additional light intercepting film 111 made of an aluminum film or some other suitable film is provided such that it extends in the horizontal direction on delivery regions and that shunt wirings 52 have a striped shape having no projections. In the solid state imaging apparatus shown in FIG. 9, since light intercepting film 111 is formed, the smear caused by light leaking through the gaps between shunt wirings 52 on the delivery regions, which is a problem with the solid state imaging apparatus shown in FIG. 4, can be suppressed to some degree. However, the solid state imaging apparatus shown in FIG. 9 involves another factor which causes smear.
FIG. 10 is a schematic perspective view of a corner at which a shunt wiring and a light intercepting film shown in FIG. 9 intersect with each other. Here, the same reference numerals are applied to the same components as those of FIGS. 5, 6 and 9.
As can be seen from FIG. 10, insulation film 79 formed above shunt wirings 52 is present below light intercepting film 111. Accordingly, thickness T1 of the insulation film between the interface between semiconductor substrate 71 and insulation film 77 and light intercepting film 111 is greater than (for example, is equal to approximately two times) the thickness (for example, approximately 0.2 .mu.m) of the insulation film between the interface between semiconductor substrate 71 and insulation film 77 and shunt wirings 52. In particular, the present structure has a problem in that oblique light from the insulation film between the interface between semiconductor substrate 71 and insulation film 77 and light intercepting film 111 is liable to leak in to cause smear. The structure has another problem also in that, where formation of light intercepting film 111 cannot be used commonly for the step of producing peripheral wirings (not shown) for imaging region 37, the PR number increases.